The field of the disclosure relates generally to power switching module assemblies and, more particularly, to power switching module assembly structures that provide low circuit inductance.
The field of the disclosure relates generally to power switching module assemblies and, more particularly, to power switching module assembly structures that provide low circuit inductance.
At least some known semiconductor power module packages route signals either through a power substrate or through metal traces in a wall geometry. For the power substrate, the signal paths are typically direct bond or active metal brazed copper or aluminum on a ceramic substrate which are single layer and require that the traces be adjacent to one another on a planar surface. The semiconductor devices are then wire, ribbon, or planar interconnect bonded to the planar metal traces which run across the module and are wire, ribbon, or planar interconnect bonded to the output terminals.
To improve the efficiency and the reliability of power semiconductor devices, the surrounding packaging connecting the power devices to the power system must introduce minimal parasitic inductance, which may contribute to power system losses or may have a detrimental impact on the capability of the device either electrically, thermally, or mechanically. For power modules, the interconnects from devices are typically implemented with wire, ribbon, or planar interconnect bonding to copper traces routed on insulating substrates called direct bond copper (DBC). For power modules, the main or commutation power loop is the path of primary concern with current flowing between the positive and negative DC terminals.